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Creators/Authors contains: "Feng, P."

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  1. We report on a new class of Ising machines (IMs) that rely on coupled parametric frequency dividers (PFDs) as macroscopic artificial spins. Unlike the IM counterparts based on subharmonic-injection locking (SHIL), PFD IMs donot require strong injected continuous-wave signals or applied dc voltages. Therefore, they show a significantly lower power consumption per spin compared to SHIL-based IMs, making it feasible to accurately solve large-scale combinatorial optimization problems that are hard or even impossible to solve by using the current von Neumann computing architectures. Furthermore, using high quality factor resonators in the PFD design makes PFD IMs able to exhibit a nanowatt-level power per spin. Also, it remarkably allows a speedup of the phase synchronization among the PFDs, resulting in shorter time to solution and lower energy to solution despite the resonators’ longer relaxation time. As a proof of concept, a 4-node PFD IM has been demonstrated. This IM correctly solves a set of Max-Cut problems while consuming just 600 nanowatts per spin. This power consumption is 2 orders of magnitude lower than the power per spin of state-of-the-art SHIL-based IMs operating at the same frequency. 
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  2. Serverless or functions as a service runtimes have shown significant benefits to efficiency and cost for event-driven cloud applications. Although serverless runtimes are limited to applications requiring lightweight computation and memory, such as machine learning prediction and inference, they have shown improvements on these applications beyond other cloud runtimes. Training deep learning can be both compute and memory intensive. We investigate the use of serverless runtimes while leveraging data parallelism for large models, show the challenges and limitations due to the tightly coupled nature of such models, and propose modifications to the underlying runtime implementations that would mitigate them. For hyper-parameter optimization of smaller deep learning models, we show that serverless runtimes can provide significant benefit 
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  3. MEMS resonators integrated with CMOS feedback networks have a potentially wide field of applications as oscillator circuits in communications and sensor systems. However, considerable advancements to this nascent technology are required to realize such a vision. We present a configurable CMOS chip which facilitates the development of MEMS-referenced oscillators, especially for timing and sensing applications in harsh environments. The chip has been designed in the OnSemi 3M2P 0.5 um process. It supports MEMS resonators with various frequencies (10–120 kHz), resonant modes, and impedance levels, thus allowing interfacing to a wide range of devices. This paper describes analysis, design, and simulation results. 
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